mirror of
https://github.com/superseriousbusiness/gotosocial.git
synced 2025-11-03 10:52:25 -06:00
bump go-store version (includes minio) (#1657)
Signed-off-by: kim <grufwub@gmail.com>
This commit is contained in:
kim
GitHub
parent
0746ef741a
commit
a5c920a50b
33 changed files with 14876 additions and 8512 deletions
17
vendor/github.com/klauspost/cpuid/v2/README.md
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17
vendor/github.com/klauspost/cpuid/v2/README.md
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@ -19,6 +19,12 @@ Package home: https://github.com/klauspost/cpuid
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`go get -u github.com/klauspost/cpuid/v2` using modules.
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Drop `v2` for others.
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Installing binary:
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`go install github.com/klauspost/cpuid/v2/cmd/cpuid@latest`
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Or download binaries from release page: https://github.com/klauspost/cpuid/releases
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### Homebrew
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For macOS/Linux users, you can install via [brew](https://brew.sh/)
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@ -302,6 +308,7 @@ Exit Code 1
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|||
| AVXSLOW | Indicates the CPU performs 2 128 bit operations instead of one |
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| AVXVNNI | AVX (VEX encoded) VNNI neural network instructions |
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| AVXVNNIINT8 | AVX-VNNI-INT8 instructions |
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| BHI_CTRL | Branch History Injection and Intra-mode Branch Target Injection / CVE-2022-0001, CVE-2022-0002 / INTEL-SA-00598 |
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| BMI1 | Bit Manipulation Instruction Set 1 |
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| BMI2 | Bit Manipulation Instruction Set 2 |
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| CETIBT | Intel CET Indirect Branch Tracking |
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@ -355,6 +362,7 @@ Exit Code 1
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| IBS_OPFUSE | AMD: Indicates support for IbsOpFuse |
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| IBS_PREVENTHOST | Disallowing IBS use by the host supported |
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| IBS_ZEN4 | Fetch and Op IBS support IBS extensions added with Zen4 |
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| IDPRED_CTRL | IPRED_DIS |
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| INT_WBINVD | WBINVD/WBNOINVD are interruptible. |
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| INVLPGB | NVLPGB and TLBSYNC instruction supported |
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| LAHF | LAHF/SAHF in long mode |
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@ -372,8 +380,9 @@ Exit Code 1
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| MOVDIRI | Move Doubleword as Direct Store |
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| MOVSB_ZL | Fast Zero-Length MOVSB |
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| MPX | Intel MPX (Memory Protection Extensions) |
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| MOVU | MOVU SSE instructions are more efficient and should be preferred to SSE MOVL/MOVH. MOVUPS is more efficient than MOVLPS/MOVHPS. MOVUPD is more efficient than MOVLPD/MOVHPD |
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| MOVU | MOVU SSE instructions are more efficient and should be preferred to SSE MOVL/MOVH. MOVUPS is more efficient than MOVLPS/MOVHPS. MOVUPD is more efficient than MOVLPD/MOVHPD |
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| MSRIRC | Instruction Retired Counter MSR available |
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| MSRLIST | Read/Write List of Model Specific Registers |
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| MSR_PAGEFLUSH | Page Flush MSR available |
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| NRIPS | Indicates support for NRIP save on VMEXIT |
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| NX | NX (No-Execute) bit |
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@ -381,12 +390,13 @@ Exit Code 1
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| PCONFIG | PCONFIG for Intel Multi-Key Total Memory Encryption |
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| POPCNT | POPCNT instruction |
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| PPIN | AMD: Protected Processor Inventory Number support. Indicates that Protected Processor Inventory Number (PPIN) capability can be enabled |
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| PREFETCHI | PREFETCHIT0/1 instructions |
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| PSFD | AMD: Predictive Store Forward Disable |
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| PREFETCHI | PREFETCHIT0/1 instructions |
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| PSFD | Predictive Store Forward Disable |
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| RDPRU | RDPRU instruction supported |
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| RDRAND | RDRAND instruction is available |
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| RDSEED | RDSEED instruction is available |
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| RDTSCP | RDTSCP Instruction |
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| RRSBA_CTRL | Restricted RSB Alternate |
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| RTM | Restricted Transactional Memory |
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| RTM_ALWAYS_ABORT | Indicates that the loaded microcode is forcing RTM abort. |
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| SERIALIZE | Serialize Instruction Execution |
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@ -439,6 +449,7 @@ Exit Code 1
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| VTE | AMD Virtual Transparent Encryption supported |
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| WAITPKG | TPAUSE, UMONITOR, UMWAIT |
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| WBNOINVD | Write Back and Do Not Invalidate Cache |
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| WRMSRNS | Non-Serializing Write to Model Specific Register |
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| X87 | FPU |
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| XGETBV1 | Supports XGETBV with ECX = 1 |
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| XOP | Bulldozer XOP functions |
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|
|
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14
vendor/github.com/klauspost/cpuid/v2/cpuid.go
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14
vendor/github.com/klauspost/cpuid/v2/cpuid.go
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@ -99,6 +99,7 @@ const (
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AVXSLOW // Indicates the CPU performs 2 128 bit operations instead of one
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AVXVNNI // AVX (VEX encoded) VNNI neural network instructions
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AVXVNNIINT8 // AVX-VNNI-INT8 instructions
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BHI_CTRL // Branch History Injection and Intra-mode Branch Target Injection / CVE-2022-0001, CVE-2022-0002 / INTEL-SA-00598
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BMI1 // Bit Manipulation Instruction Set 1
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BMI2 // Bit Manipulation Instruction Set 2
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CETIBT // Intel CET Indirect Branch Tracking
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@ -152,6 +153,7 @@ const (
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IBS_OPFUSE // AMD: Indicates support for IbsOpFuse
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IBS_PREVENTHOST // Disallowing IBS use by the host supported
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IBS_ZEN4 // AMD: Fetch and Op IBS support IBS extensions added with Zen4
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IDPRED_CTRL // IPRED_DIS
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INT_WBINVD // WBINVD/WBNOINVD are interruptible.
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INVLPGB // NVLPGB and TLBSYNC instruction supported
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LAHF // LAHF/SAHF in long mode
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@ -171,6 +173,7 @@ const (
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MOVU // AMD: MOVU SSE instructions are more efficient and should be preferred to SSE MOVL/MOVH. MOVUPS is more efficient than MOVLPS/MOVHPS. MOVUPD is more efficient than MOVLPD/MOVHPD
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MPX // Intel MPX (Memory Protection Extensions)
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MSRIRC // Instruction Retired Counter MSR available
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MSRLIST // Read/Write List of Model Specific Registers
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MSR_PAGEFLUSH // Page Flush MSR available
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NRIPS // Indicates support for NRIP save on VMEXIT
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NX // NX (No-Execute) bit
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@ -179,11 +182,12 @@ const (
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POPCNT // POPCNT instruction
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PPIN // AMD: Protected Processor Inventory Number support. Indicates that Protected Processor Inventory Number (PPIN) capability can be enabled
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PREFETCHI // PREFETCHIT0/1 instructions
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PSFD // AMD: Predictive Store Forward Disable
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PSFD // Predictive Store Forward Disable
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RDPRU // RDPRU instruction supported
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RDRAND // RDRAND instruction is available
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RDSEED // RDSEED instruction is available
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RDTSCP // RDTSCP Instruction
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RRSBA_CTRL // Restricted RSB Alternate
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RTM // Restricted Transactional Memory
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RTM_ALWAYS_ABORT // Indicates that the loaded microcode is forcing RTM abort.
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SERIALIZE // Serialize Instruction Execution
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@ -236,6 +240,7 @@ const (
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VTE // AMD Virtual Transparent Encryption supported
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WAITPKG // TPAUSE, UMONITOR, UMWAIT
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WBNOINVD // Write Back and Do Not Invalidate Cache
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WRMSRNS // Non-Serializing Write to Model Specific Register
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X87 // FPU
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XGETBV1 // Supports XGETBV with ECX = 1
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XOP // Bulldozer XOP functions
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@ -1232,13 +1237,20 @@ func support() flagSet {
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fs.setIf(edx&(1<<25) != 0, AMXINT8)
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// eax1 = CPUID.(EAX=7, ECX=1).EAX
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fs.setIf(eax1&(1<<5) != 0, AVX512BF16)
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fs.setIf(eax1&(1<<19) != 0, WRMSRNS)
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fs.setIf(eax1&(1<<21) != 0, AMXFP16)
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fs.setIf(eax1&(1<<27) != 0, MSRLIST)
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}
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}
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// CPUID.(EAX=7, ECX=2)
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_, _, _, edx = cpuidex(7, 2)
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fs.setIf(edx&(1<<0) != 0, PSFD)
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fs.setIf(edx&(1<<1) != 0, IDPRED_CTRL)
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fs.setIf(edx&(1<<2) != 0, RRSBA_CTRL)
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fs.setIf(edx&(1<<4) != 0, BHI_CTRL)
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fs.setIf(edx&(1<<5) != 0, MCDT_NO)
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}
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// Processor Extended State Enumeration Sub-leaf (EAX = 0DH, ECX = 1)
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|
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347
vendor/github.com/klauspost/cpuid/v2/featureid_string.go
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347
vendor/github.com/klauspost/cpuid/v2/featureid_string.go
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@ -39,181 +39,186 @@ func _() {
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_ = x[AVXSLOW-29]
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_ = x[AVXVNNI-30]
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_ = x[AVXVNNIINT8-31]
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_ = x[BMI1-32]
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_ = x[BMI2-33]
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_ = x[CETIBT-34]
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_ = x[CETSS-35]
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_ = x[CLDEMOTE-36]
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_ = x[CLMUL-37]
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_ = x[CLZERO-38]
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_ = x[CMOV-39]
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_ = x[CMPCCXADD-40]
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_ = x[CMPSB_SCADBS_SHORT-41]
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_ = x[CMPXCHG8-42]
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_ = x[CPBOOST-43]
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_ = x[CPPC-44]
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_ = x[CX16-45]
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_ = x[EFER_LMSLE_UNS-46]
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_ = x[ENQCMD-47]
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_ = x[ERMS-48]
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_ = x[F16C-49]
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_ = x[FLUSH_L1D-50]
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_ = x[FMA3-51]
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_ = x[FMA4-52]
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_ = x[FP128-53]
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_ = x[FP256-54]
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_ = x[FSRM-55]
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_ = x[FXSR-56]
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_ = x[FXSROPT-57]
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_ = x[GFNI-58]
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_ = x[HLE-59]
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_ = x[HRESET-60]
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_ = x[HTT-61]
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_ = x[HWA-62]
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_ = x[HYBRID_CPU-63]
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_ = x[HYPERVISOR-64]
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_ = x[IA32_ARCH_CAP-65]
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_ = x[IA32_CORE_CAP-66]
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_ = x[IBPB-67]
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_ = x[IBRS-68]
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_ = x[IBRS_PREFERRED-69]
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_ = x[IBRS_PROVIDES_SMP-70]
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_ = x[IBS-71]
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_ = x[IBSBRNTRGT-72]
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_ = x[IBSFETCHSAM-73]
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_ = x[IBSFFV-74]
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_ = x[IBSOPCNT-75]
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_ = x[IBSOPCNTEXT-76]
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_ = x[IBSOPSAM-77]
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_ = x[IBSRDWROPCNT-78]
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_ = x[IBSRIPINVALIDCHK-79]
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_ = x[IBS_FETCH_CTLX-80]
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_ = x[IBS_OPDATA4-81]
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_ = x[IBS_OPFUSE-82]
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_ = x[IBS_PREVENTHOST-83]
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_ = x[IBS_ZEN4-84]
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_ = x[INT_WBINVD-85]
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_ = x[INVLPGB-86]
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_ = x[LAHF-87]
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_ = x[LAM-88]
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_ = x[LBRVIRT-89]
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_ = x[LZCNT-90]
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_ = x[MCAOVERFLOW-91]
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_ = x[MCDT_NO-92]
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_ = x[MCOMMIT-93]
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_ = x[MD_CLEAR-94]
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_ = x[MMX-95]
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_ = x[MMXEXT-96]
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_ = x[MOVBE-97]
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_ = x[MOVDIR64B-98]
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_ = x[MOVDIRI-99]
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_ = x[MOVSB_ZL-100]
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_ = x[MOVU-101]
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_ = x[MPX-102]
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||||
_ = x[MSRIRC-103]
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_ = x[MSR_PAGEFLUSH-104]
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_ = x[NRIPS-105]
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_ = x[NX-106]
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_ = x[OSXSAVE-107]
|
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_ = x[PCONFIG-108]
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_ = x[POPCNT-109]
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||||
_ = x[PPIN-110]
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_ = x[PREFETCHI-111]
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_ = x[PSFD-112]
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_ = x[RDPRU-113]
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_ = x[RDRAND-114]
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_ = x[RDSEED-115]
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_ = x[RDTSCP-116]
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_ = x[RTM-117]
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_ = x[RTM_ALWAYS_ABORT-118]
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_ = x[SERIALIZE-119]
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_ = x[SEV-120]
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_ = x[SEV_64BIT-121]
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_ = x[SEV_ALTERNATIVE-122]
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_ = x[SEV_DEBUGSWAP-123]
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_ = x[SEV_ES-124]
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_ = x[SEV_RESTRICTED-125]
|
||||
_ = x[SEV_SNP-126]
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||||
_ = x[SGX-127]
|
||||
_ = x[SGXLC-128]
|
||||
_ = x[SHA-129]
|
||||
_ = x[SME-130]
|
||||
_ = x[SME_COHERENT-131]
|
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_ = x[SPEC_CTRL_SSBD-132]
|
||||
_ = x[SRBDS_CTRL-133]
|
||||
_ = x[SSE-134]
|
||||
_ = x[SSE2-135]
|
||||
_ = x[SSE3-136]
|
||||
_ = x[SSE4-137]
|
||||
_ = x[SSE42-138]
|
||||
_ = x[SSE4A-139]
|
||||
_ = x[SSSE3-140]
|
||||
_ = x[STIBP-141]
|
||||
_ = x[STIBP_ALWAYSON-142]
|
||||
_ = x[STOSB_SHORT-143]
|
||||
_ = x[SUCCOR-144]
|
||||
_ = x[SVM-145]
|
||||
_ = x[SVMDA-146]
|
||||
_ = x[SVMFBASID-147]
|
||||
_ = x[SVML-148]
|
||||
_ = x[SVMNP-149]
|
||||
_ = x[SVMPF-150]
|
||||
_ = x[SVMPFT-151]
|
||||
_ = x[SYSCALL-152]
|
||||
_ = x[SYSEE-153]
|
||||
_ = x[TBM-154]
|
||||
_ = x[TLB_FLUSH_NESTED-155]
|
||||
_ = x[TME-156]
|
||||
_ = x[TOPEXT-157]
|
||||
_ = x[TSCRATEMSR-158]
|
||||
_ = x[TSXLDTRK-159]
|
||||
_ = x[VAES-160]
|
||||
_ = x[VMCBCLEAN-161]
|
||||
_ = x[VMPL-162]
|
||||
_ = x[VMSA_REGPROT-163]
|
||||
_ = x[VMX-164]
|
||||
_ = x[VPCLMULQDQ-165]
|
||||
_ = x[VTE-166]
|
||||
_ = x[WAITPKG-167]
|
||||
_ = x[WBNOINVD-168]
|
||||
_ = x[X87-169]
|
||||
_ = x[XGETBV1-170]
|
||||
_ = x[XOP-171]
|
||||
_ = x[XSAVE-172]
|
||||
_ = x[XSAVEC-173]
|
||||
_ = x[XSAVEOPT-174]
|
||||
_ = x[XSAVES-175]
|
||||
_ = x[AESARM-176]
|
||||
_ = x[ARMCPUID-177]
|
||||
_ = x[ASIMD-178]
|
||||
_ = x[ASIMDDP-179]
|
||||
_ = x[ASIMDHP-180]
|
||||
_ = x[ASIMDRDM-181]
|
||||
_ = x[ATOMICS-182]
|
||||
_ = x[CRC32-183]
|
||||
_ = x[DCPOP-184]
|
||||
_ = x[EVTSTRM-185]
|
||||
_ = x[FCMA-186]
|
||||
_ = x[FP-187]
|
||||
_ = x[FPHP-188]
|
||||
_ = x[GPA-189]
|
||||
_ = x[JSCVT-190]
|
||||
_ = x[LRCPC-191]
|
||||
_ = x[PMULL-192]
|
||||
_ = x[SHA1-193]
|
||||
_ = x[SHA2-194]
|
||||
_ = x[SHA3-195]
|
||||
_ = x[SHA512-196]
|
||||
_ = x[SM3-197]
|
||||
_ = x[SM4-198]
|
||||
_ = x[SVE-199]
|
||||
_ = x[lastID-200]
|
||||
_ = x[BHI_CTRL-32]
|
||||
_ = x[BMI1-33]
|
||||
_ = x[BMI2-34]
|
||||
_ = x[CETIBT-35]
|
||||
_ = x[CETSS-36]
|
||||
_ = x[CLDEMOTE-37]
|
||||
_ = x[CLMUL-38]
|
||||
_ = x[CLZERO-39]
|
||||
_ = x[CMOV-40]
|
||||
_ = x[CMPCCXADD-41]
|
||||
_ = x[CMPSB_SCADBS_SHORT-42]
|
||||
_ = x[CMPXCHG8-43]
|
||||
_ = x[CPBOOST-44]
|
||||
_ = x[CPPC-45]
|
||||
_ = x[CX16-46]
|
||||
_ = x[EFER_LMSLE_UNS-47]
|
||||
_ = x[ENQCMD-48]
|
||||
_ = x[ERMS-49]
|
||||
_ = x[F16C-50]
|
||||
_ = x[FLUSH_L1D-51]
|
||||
_ = x[FMA3-52]
|
||||
_ = x[FMA4-53]
|
||||
_ = x[FP128-54]
|
||||
_ = x[FP256-55]
|
||||
_ = x[FSRM-56]
|
||||
_ = x[FXSR-57]
|
||||
_ = x[FXSROPT-58]
|
||||
_ = x[GFNI-59]
|
||||
_ = x[HLE-60]
|
||||
_ = x[HRESET-61]
|
||||
_ = x[HTT-62]
|
||||
_ = x[HWA-63]
|
||||
_ = x[HYBRID_CPU-64]
|
||||
_ = x[HYPERVISOR-65]
|
||||
_ = x[IA32_ARCH_CAP-66]
|
||||
_ = x[IA32_CORE_CAP-67]
|
||||
_ = x[IBPB-68]
|
||||
_ = x[IBRS-69]
|
||||
_ = x[IBRS_PREFERRED-70]
|
||||
_ = x[IBRS_PROVIDES_SMP-71]
|
||||
_ = x[IBS-72]
|
||||
_ = x[IBSBRNTRGT-73]
|
||||
_ = x[IBSFETCHSAM-74]
|
||||
_ = x[IBSFFV-75]
|
||||
_ = x[IBSOPCNT-76]
|
||||
_ = x[IBSOPCNTEXT-77]
|
||||
_ = x[IBSOPSAM-78]
|
||||
_ = x[IBSRDWROPCNT-79]
|
||||
_ = x[IBSRIPINVALIDCHK-80]
|
||||
_ = x[IBS_FETCH_CTLX-81]
|
||||
_ = x[IBS_OPDATA4-82]
|
||||
_ = x[IBS_OPFUSE-83]
|
||||
_ = x[IBS_PREVENTHOST-84]
|
||||
_ = x[IBS_ZEN4-85]
|
||||
_ = x[IDPRED_CTRL-86]
|
||||
_ = x[INT_WBINVD-87]
|
||||
_ = x[INVLPGB-88]
|
||||
_ = x[LAHF-89]
|
||||
_ = x[LAM-90]
|
||||
_ = x[LBRVIRT-91]
|
||||
_ = x[LZCNT-92]
|
||||
_ = x[MCAOVERFLOW-93]
|
||||
_ = x[MCDT_NO-94]
|
||||
_ = x[MCOMMIT-95]
|
||||
_ = x[MD_CLEAR-96]
|
||||
_ = x[MMX-97]
|
||||
_ = x[MMXEXT-98]
|
||||
_ = x[MOVBE-99]
|
||||
_ = x[MOVDIR64B-100]
|
||||
_ = x[MOVDIRI-101]
|
||||
_ = x[MOVSB_ZL-102]
|
||||
_ = x[MOVU-103]
|
||||
_ = x[MPX-104]
|
||||
_ = x[MSRIRC-105]
|
||||
_ = x[MSRLIST-106]
|
||||
_ = x[MSR_PAGEFLUSH-107]
|
||||
_ = x[NRIPS-108]
|
||||
_ = x[NX-109]
|
||||
_ = x[OSXSAVE-110]
|
||||
_ = x[PCONFIG-111]
|
||||
_ = x[POPCNT-112]
|
||||
_ = x[PPIN-113]
|
||||
_ = x[PREFETCHI-114]
|
||||
_ = x[PSFD-115]
|
||||
_ = x[RDPRU-116]
|
||||
_ = x[RDRAND-117]
|
||||
_ = x[RDSEED-118]
|
||||
_ = x[RDTSCP-119]
|
||||
_ = x[RRSBA_CTRL-120]
|
||||
_ = x[RTM-121]
|
||||
_ = x[RTM_ALWAYS_ABORT-122]
|
||||
_ = x[SERIALIZE-123]
|
||||
_ = x[SEV-124]
|
||||
_ = x[SEV_64BIT-125]
|
||||
_ = x[SEV_ALTERNATIVE-126]
|
||||
_ = x[SEV_DEBUGSWAP-127]
|
||||
_ = x[SEV_ES-128]
|
||||
_ = x[SEV_RESTRICTED-129]
|
||||
_ = x[SEV_SNP-130]
|
||||
_ = x[SGX-131]
|
||||
_ = x[SGXLC-132]
|
||||
_ = x[SHA-133]
|
||||
_ = x[SME-134]
|
||||
_ = x[SME_COHERENT-135]
|
||||
_ = x[SPEC_CTRL_SSBD-136]
|
||||
_ = x[SRBDS_CTRL-137]
|
||||
_ = x[SSE-138]
|
||||
_ = x[SSE2-139]
|
||||
_ = x[SSE3-140]
|
||||
_ = x[SSE4-141]
|
||||
_ = x[SSE42-142]
|
||||
_ = x[SSE4A-143]
|
||||
_ = x[SSSE3-144]
|
||||
_ = x[STIBP-145]
|
||||
_ = x[STIBP_ALWAYSON-146]
|
||||
_ = x[STOSB_SHORT-147]
|
||||
_ = x[SUCCOR-148]
|
||||
_ = x[SVM-149]
|
||||
_ = x[SVMDA-150]
|
||||
_ = x[SVMFBASID-151]
|
||||
_ = x[SVML-152]
|
||||
_ = x[SVMNP-153]
|
||||
_ = x[SVMPF-154]
|
||||
_ = x[SVMPFT-155]
|
||||
_ = x[SYSCALL-156]
|
||||
_ = x[SYSEE-157]
|
||||
_ = x[TBM-158]
|
||||
_ = x[TLB_FLUSH_NESTED-159]
|
||||
_ = x[TME-160]
|
||||
_ = x[TOPEXT-161]
|
||||
_ = x[TSCRATEMSR-162]
|
||||
_ = x[TSXLDTRK-163]
|
||||
_ = x[VAES-164]
|
||||
_ = x[VMCBCLEAN-165]
|
||||
_ = x[VMPL-166]
|
||||
_ = x[VMSA_REGPROT-167]
|
||||
_ = x[VMX-168]
|
||||
_ = x[VPCLMULQDQ-169]
|
||||
_ = x[VTE-170]
|
||||
_ = x[WAITPKG-171]
|
||||
_ = x[WBNOINVD-172]
|
||||
_ = x[WRMSRNS-173]
|
||||
_ = x[X87-174]
|
||||
_ = x[XGETBV1-175]
|
||||
_ = x[XOP-176]
|
||||
_ = x[XSAVE-177]
|
||||
_ = x[XSAVEC-178]
|
||||
_ = x[XSAVEOPT-179]
|
||||
_ = x[XSAVES-180]
|
||||
_ = x[AESARM-181]
|
||||
_ = x[ARMCPUID-182]
|
||||
_ = x[ASIMD-183]
|
||||
_ = x[ASIMDDP-184]
|
||||
_ = x[ASIMDHP-185]
|
||||
_ = x[ASIMDRDM-186]
|
||||
_ = x[ATOMICS-187]
|
||||
_ = x[CRC32-188]
|
||||
_ = x[DCPOP-189]
|
||||
_ = x[EVTSTRM-190]
|
||||
_ = x[FCMA-191]
|
||||
_ = x[FP-192]
|
||||
_ = x[FPHP-193]
|
||||
_ = x[GPA-194]
|
||||
_ = x[JSCVT-195]
|
||||
_ = x[LRCPC-196]
|
||||
_ = x[PMULL-197]
|
||||
_ = x[SHA1-198]
|
||||
_ = x[SHA2-199]
|
||||
_ = x[SHA3-200]
|
||||
_ = x[SHA512-201]
|
||||
_ = x[SM3-202]
|
||||
_ = x[SM4-203]
|
||||
_ = x[SVE-204]
|
||||
_ = x[lastID-205]
|
||||
_ = x[firstID-0]
|
||||
}
|
||||
|
||||
const _FeatureID_name = "firstIDADXAESNIAMD3DNOWAMD3DNOWEXTAMXBF16AMXFP16AMXINT8AMXTILEAVXAVX2AVX512BF16AVX512BITALGAVX512BWAVX512CDAVX512DQAVX512ERAVX512FAVX512FP16AVX512IFMAAVX512PFAVX512VBMIAVX512VBMI2AVX512VLAVX512VNNIAVX512VP2INTERSECTAVX512VPOPCNTDQAVXIFMAAVXNECONVERTAVXSLOWAVXVNNIAVXVNNIINT8BMI1BMI2CETIBTCETSSCLDEMOTECLMULCLZEROCMOVCMPCCXADDCMPSB_SCADBS_SHORTCMPXCHG8CPBOOSTCPPCCX16EFER_LMSLE_UNSENQCMDERMSF16CFLUSH_L1DFMA3FMA4FP128FP256FSRMFXSRFXSROPTGFNIHLEHRESETHTTHWAHYBRID_CPUHYPERVISORIA32_ARCH_CAPIA32_CORE_CAPIBPBIBRSIBRS_PREFERREDIBRS_PROVIDES_SMPIBSIBSBRNTRGTIBSFETCHSAMIBSFFVIBSOPCNTIBSOPCNTEXTIBSOPSAMIBSRDWROPCNTIBSRIPINVALIDCHKIBS_FETCH_CTLXIBS_OPDATA4IBS_OPFUSEIBS_PREVENTHOSTIBS_ZEN4INT_WBINVDINVLPGBLAHFLAMLBRVIRTLZCNTMCAOVERFLOWMCDT_NOMCOMMITMD_CLEARMMXMMXEXTMOVBEMOVDIR64BMOVDIRIMOVSB_ZLMOVUMPXMSRIRCMSR_PAGEFLUSHNRIPSNXOSXSAVEPCONFIGPOPCNTPPINPREFETCHIPSFDRDPRURDRANDRDSEEDRDTSCPRTMRTM_ALWAYS_ABORTSERIALIZESEVSEV_64BITSEV_ALTERNATIVESEV_DEBUGSWAPSEV_ESSEV_RESTRICTEDSEV_SNPSGXSGXLCSHASMESME_COHERENTSPEC_CTRL_SSBDSRBDS_CTRLSSESSE2SSE3SSE4SSE42SSE4ASSSE3STIBPSTIBP_ALWAYSONSTOSB_SHORTSUCCORSVMSVMDASVMFBASIDSVMLSVMNPSVMPFSVMPFTSYSCALLSYSEETBMTLB_FLUSH_NESTEDTMETOPEXTTSCRATEMSRTSXLDTRKVAESVMCBCLEANVMPLVMSA_REGPROTVMXVPCLMULQDQVTEWAITPKGWBNOINVDX87XGETBV1XOPXSAVEXSAVECXSAVEOPTXSAVESAESARMARMCPUIDASIMDASIMDDPASIMDHPASIMDRDMATOMICSCRC32DCPOPEVTSTRMFCMAFPFPHPGPAJSCVTLRCPCPMULLSHA1SHA2SHA3SHA512SM3SM4SVElastID"
|
||||
const _FeatureID_name = "firstIDADXAESNIAMD3DNOWAMD3DNOWEXTAMXBF16AMXFP16AMXINT8AMXTILEAVXAVX2AVX512BF16AVX512BITALGAVX512BWAVX512CDAVX512DQAVX512ERAVX512FAVX512FP16AVX512IFMAAVX512PFAVX512VBMIAVX512VBMI2AVX512VLAVX512VNNIAVX512VP2INTERSECTAVX512VPOPCNTDQAVXIFMAAVXNECONVERTAVXSLOWAVXVNNIAVXVNNIINT8BHI_CTRLBMI1BMI2CETIBTCETSSCLDEMOTECLMULCLZEROCMOVCMPCCXADDCMPSB_SCADBS_SHORTCMPXCHG8CPBOOSTCPPCCX16EFER_LMSLE_UNSENQCMDERMSF16CFLUSH_L1DFMA3FMA4FP128FP256FSRMFXSRFXSROPTGFNIHLEHRESETHTTHWAHYBRID_CPUHYPERVISORIA32_ARCH_CAPIA32_CORE_CAPIBPBIBRSIBRS_PREFERREDIBRS_PROVIDES_SMPIBSIBSBRNTRGTIBSFETCHSAMIBSFFVIBSOPCNTIBSOPCNTEXTIBSOPSAMIBSRDWROPCNTIBSRIPINVALIDCHKIBS_FETCH_CTLXIBS_OPDATA4IBS_OPFUSEIBS_PREVENTHOSTIBS_ZEN4IDPRED_CTRLINT_WBINVDINVLPGBLAHFLAMLBRVIRTLZCNTMCAOVERFLOWMCDT_NOMCOMMITMD_CLEARMMXMMXEXTMOVBEMOVDIR64BMOVDIRIMOVSB_ZLMOVUMPXMSRIRCMSRLISTMSR_PAGEFLUSHNRIPSNXOSXSAVEPCONFIGPOPCNTPPINPREFETCHIPSFDRDPRURDRANDRDSEEDRDTSCPRRSBA_CTRLRTMRTM_ALWAYS_ABORTSERIALIZESEVSEV_64BITSEV_ALTERNATIVESEV_DEBUGSWAPSEV_ESSEV_RESTRICTEDSEV_SNPSGXSGXLCSHASMESME_COHERENTSPEC_CTRL_SSBDSRBDS_CTRLSSESSE2SSE3SSE4SSE42SSE4ASSSE3STIBPSTIBP_ALWAYSONSTOSB_SHORTSUCCORSVMSVMDASVMFBASIDSVMLSVMNPSVMPFSVMPFTSYSCALLSYSEETBMTLB_FLUSH_NESTEDTMETOPEXTTSCRATEMSRTSXLDTRKVAESVMCBCLEANVMPLVMSA_REGPROTVMXVPCLMULQDQVTEWAITPKGWBNOINVDWRMSRNSX87XGETBV1XOPXSAVEXSAVECXSAVEOPTXSAVESAESARMARMCPUIDASIMDASIMDDPASIMDHPASIMDRDMATOMICSCRC32DCPOPEVTSTRMFCMAFPFPHPGPAJSCVTLRCPCPMULLSHA1SHA2SHA3SHA512SM3SM4SVElastID"
|
||||
|
||||
var _FeatureID_index = [...]uint16{0, 7, 10, 15, 23, 34, 41, 48, 55, 62, 65, 69, 79, 91, 99, 107, 115, 123, 130, 140, 150, 158, 168, 179, 187, 197, 215, 230, 237, 249, 256, 263, 274, 278, 282, 288, 293, 301, 306, 312, 316, 325, 343, 351, 358, 362, 366, 380, 386, 390, 394, 403, 407, 411, 416, 421, 425, 429, 436, 440, 443, 449, 452, 455, 465, 475, 488, 501, 505, 509, 523, 540, 543, 553, 564, 570, 578, 589, 597, 609, 625, 639, 650, 660, 675, 683, 693, 700, 704, 707, 714, 719, 730, 737, 744, 752, 755, 761, 766, 775, 782, 790, 794, 797, 803, 816, 821, 823, 830, 837, 843, 847, 856, 860, 865, 871, 877, 883, 886, 902, 911, 914, 923, 938, 951, 957, 971, 978, 981, 986, 989, 992, 1004, 1018, 1028, 1031, 1035, 1039, 1043, 1048, 1053, 1058, 1063, 1077, 1088, 1094, 1097, 1102, 1111, 1115, 1120, 1125, 1131, 1138, 1143, 1146, 1162, 1165, 1171, 1181, 1189, 1193, 1202, 1206, 1218, 1221, 1231, 1234, 1241, 1249, 1252, 1259, 1262, 1267, 1273, 1281, 1287, 1293, 1301, 1306, 1313, 1320, 1328, 1335, 1340, 1345, 1352, 1356, 1358, 1362, 1365, 1370, 1375, 1380, 1384, 1388, 1392, 1398, 1401, 1404, 1407, 1413}
|
||||
var _FeatureID_index = [...]uint16{0, 7, 10, 15, 23, 34, 41, 48, 55, 62, 65, 69, 79, 91, 99, 107, 115, 123, 130, 140, 150, 158, 168, 179, 187, 197, 215, 230, 237, 249, 256, 263, 274, 282, 286, 290, 296, 301, 309, 314, 320, 324, 333, 351, 359, 366, 370, 374, 388, 394, 398, 402, 411, 415, 419, 424, 429, 433, 437, 444, 448, 451, 457, 460, 463, 473, 483, 496, 509, 513, 517, 531, 548, 551, 561, 572, 578, 586, 597, 605, 617, 633, 647, 658, 668, 683, 691, 702, 712, 719, 723, 726, 733, 738, 749, 756, 763, 771, 774, 780, 785, 794, 801, 809, 813, 816, 822, 829, 842, 847, 849, 856, 863, 869, 873, 882, 886, 891, 897, 903, 909, 919, 922, 938, 947, 950, 959, 974, 987, 993, 1007, 1014, 1017, 1022, 1025, 1028, 1040, 1054, 1064, 1067, 1071, 1075, 1079, 1084, 1089, 1094, 1099, 1113, 1124, 1130, 1133, 1138, 1147, 1151, 1156, 1161, 1167, 1174, 1179, 1182, 1198, 1201, 1207, 1217, 1225, 1229, 1238, 1242, 1254, 1257, 1267, 1270, 1277, 1285, 1292, 1295, 1302, 1305, 1310, 1316, 1324, 1330, 1336, 1344, 1349, 1356, 1363, 1371, 1378, 1383, 1388, 1395, 1399, 1401, 1405, 1408, 1413, 1418, 1423, 1427, 1431, 1435, 1441, 1444, 1447, 1450, 1456}
|
||||
|
||||
func (i FeatureID) String() string {
|
||||
if i < 0 || i >= FeatureID(len(_FeatureID_index)-1) {
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue