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	[chore] Update gin to v1.9.0 (#1553)
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					 347 changed files with 166814 additions and 3671 deletions
				
			
		
							
								
								
									
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								vendor/github.com/twitchyliquid64/golang-asm/asm/arch/riscv64.go
									
										
									
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								vendor/github.com/twitchyliquid64/golang-asm/asm/arch/riscv64.go
									
										
									
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							|  | @ -0,0 +1,28 @@ | |||
| // Copyright 2020 The Go Authors. All rights reserved. | ||||
| // Use of this source code is governed by a BSD-style | ||||
| // license that can be found in the LICENSE file. | ||||
| 
 | ||||
| // This file encapsulates some of the odd characteristics of the RISCV64 | ||||
| // instruction set, to minimize its interaction with the core of the | ||||
| // assembler. | ||||
| 
 | ||||
| package arch | ||||
| 
 | ||||
| import ( | ||||
| 	"github.com/twitchyliquid64/golang-asm/obj" | ||||
| 	"github.com/twitchyliquid64/golang-asm/obj/riscv" | ||||
| ) | ||||
| 
 | ||||
| // IsRISCV64AMO reports whether the op (as defined by a riscv.A* | ||||
| // constant) is one of the AMO instructions that requires special | ||||
| // handling. | ||||
| func IsRISCV64AMO(op obj.As) bool { | ||||
| 	switch op { | ||||
| 	case riscv.ASCW, riscv.ASCD, riscv.AAMOSWAPW, riscv.AAMOSWAPD, riscv.AAMOADDW, riscv.AAMOADDD, | ||||
| 		riscv.AAMOANDW, riscv.AAMOANDD, riscv.AAMOORW, riscv.AAMOORD, riscv.AAMOXORW, riscv.AAMOXORD, | ||||
| 		riscv.AAMOMINW, riscv.AAMOMIND, riscv.AAMOMINUW, riscv.AAMOMINUD, | ||||
| 		riscv.AAMOMAXW, riscv.AAMOMAXD, riscv.AAMOMAXUW, riscv.AAMOMAXUD: | ||||
| 		return true | ||||
| 	} | ||||
| 	return false | ||||
| } | ||||
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